CO EXAM updates hurry up guy's.....(Important computer organisation and architecture 3rd sem engineering)

               Most IMP Questions of COA
MODULE : 1
1) Define Flip Flop. Explain any two application of it.
2) Draw and explain a common bus system for four registers.
3) Explain memory transfer.
4) Explain bus transfer.
5) Explain logic micro operation and list application of it.
6) Explain three state bus buffer.
MODULE : 2
1) List Memory Reference Instruction and explain any one of it.
2) Give list of basic computer register with their size and draw register organization with memory bank.
3) Draw and explain control unit of basic computer system.
4) Explain Instruction cycle.
5) Explain Instruction format.
6) Explain AND and BSA instructions.
7) Explain scheme used to differentiate 3 types of instructions in basic computer.
MODULE : 3
1) Explain stack organization of CPU.
2) Explain general register organization.
3) Explain any four addressing mode.
4) Explain characteristics of RISC and CISC.
5) (3*4) + (5*6) convert into RPN and show stack operations.
MODULE : 4
1) Explain RAM, ROM, EPROM and EEPROM.
2) Explain Main Memory.
3) Explain Virtual Memory.
4) Explain cache memory with any one mapping technique.
5) Explain Associative Memory.
6) Explain Auxiliary Memory.
MODULE: 5
1) Explain Method of Asynchronous Data Transfer.
2) Explain modes of Data Transfer.
3) Explain DMA.
4) Explain CPU-IOP communications.




Some important questions and answers:-
1 Draw and explain Block Diagram of Digital Computers.
 It is an interconnection of digital modules.
 It is a system that manipulates discrete elements of information that is represented internally in a binary form.
 Advantages: 
o Easy to Design
 Low Cost
o Very Fast Speed
o More Popular with upgrading Technology
o Easy to Function
o Easy to Program

Q-2 Explain the Register Transfer Language.


 
 Definition: The symbolic notation used to describe the micro operation transfers among registers 
is called a register transfer language.
 It is a convenient tool for describing the internal organization of digital computers in concise and 
precise manner.
 The statement below denotes a transfer of the content of register R1 into register R2.
R2 ← R1



Q- 3 Define Flip Flop. Explain any two application of it.
 It can store 1-bit information.
 It can be designed using NAND or NOR gates.
 It has to stable states: Logic 1 and Logic 0
 Types of Flip Flop
1. RS Flip Flop
2. D Flip Flop
3. T Flip Flop
4. JK Flip Flop
5. Master Slave JK Flip Flop
 Application Of Flip Flop
1.Used as a memory element
2.Used as a delay element
3.Used as a basic block in counters and registers 

Q-4 Draw and explain a common bus system for four registers.
 
o Bus is a path(of a group of wires) over which information is transferred, from any of several 
sources to any of several destinations.
o A bus structure consists of a set of common lines, one for each bit of a register, through which binary 
information is transferred one at a time.
o Control signal determine which register is selected by the bus.
o The two selection lines S1and S0are connected to the selection inputs of all four multiplexers.
o The selection lines choose the four bits of one register and transfer them into the four-line common bus.



Q- 5 Explain Memory Transfer.

• Read Operation: The transfer of information from a memory word to the outside environment is 
called a read operation.
Write Operation: The transfer of new information to be stored into the memory is called a write 
operation. 
• A memory word will be symbolized by the letter M. 
Read: DR ←M[AR] 
This causes a transfer of information into DR from the memory word M selected by the address in AR. 
Write: M[AR] ←R1 
This causes a transfer of information from R1 into memory word M selected by address AR. 

Q-6 Draw and explain Logic Micro-operations in detail. (Hardware implementation of Logic micro operation.)
Logic micro operations specify binary operations for strings of bits stored in registers. 
Fig. Hardware implementation of Logic micro operation


7 Explain application of logic micro operations. 
OR
Explain selective set, selective complement and selective clear.
Logic micro operations specify binary operations for strings of bits stored in registers. 
1) Selective-Set operation: 
a. The selective-set operation sets to 1 the bits in register A where there are 
corresponding 1's in register B. It does not affect bit positions that have 0's in B. 
The following numerical example clarifies this operation: 
1010 A before 
1100 B(logical operand) 
1110 A after 
b. The two leftmost bits of B are 1's, so the corresponding bits of A are set to 1. 
c. One of these two bits was already set and the other has been changed from 0 to 1. 
d. The two bits of A with corresponding 0's in B remain unchanged. 
e. The OR microoperation can be used to selectively set bits of a register. 
2) Selective-Complement operation: 
 The selective-complement operation complements bits in A where there are 
corresponding 1's in B. It does not affect bit positions that have O's in B. For 
example: 
1010 A before 
1100 B(logical operand) 
0110 A after 
 Again the two leftmost bits of B are 1's, so the corresponding bits of A are 
complemented. 
 The exclusive-OR microoperation can be used to selectively complement bits of 
a register. 

Q- 8 Explain three-state bus buffer. OR 
Explain the operation of three state bus buffers and show its use in design of common bus. 
 A bus system can be constructed with three-state gates instead of multiplexers. 
 A three-state gate is a digital circuit that exhibits three states. 
State 1: Signal equivalent to Logic 1 
State 2: Signal equivalent to Logic 0 
State 3: High Impedance State (behaves as open circuit) 
 The high-impedance state behaves like an open circuit.
 The graphic symbol of a three-state buffer gate is shown in figure below: 
Output Y=A if C=1 
High Impedance if C=0
fig: Bus line with 3 state buffer


Q-8 Draw and explain the flowchart for instruction cycle.
Ans
In the basic computer each instruction cycle consists of the following phases:
1. Fetch an instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory if the instruction has an indirect address.
4. Execute the instruction.

fig:-Flowchart for instruction cycle

Q-9 Explain any four addressing mode.
1) Implied mode:
 Operands are specified implicitly in the definition of the instruction.
 Example: The instruction, “Complement Accumulator “ is implied mode instruction,
because the operand in accumulator register is implied in the definition of the instruction.
 All register reference instruction that use accumulator are implied.
 Zero address instruction are implied mode instruction.
2) Immediate Mode:
 In this mode the operand is specified in the instruction itself.
 Immediate mode instruction has an operand field instead of an address field.
3) Register Mode:
 In this mode the operands are in registers that resides within the CPU.
 The particular register is selected from a register field in the instruction.
4) Register Indirect Mode:
 The instruction specifies a register in the CPU, whose contents give the address of
the operand in memory.
 The advantage of this mode is that address field of the instruction uses fewer bits
to select a register than would have been required to specify a memory address
directly.
5) Direct Address Mode:
 In this mode the effective address is equal to the address part of the instruction. The
operand resides in memory and its address is given directly by the address field of the
instruction.

Q-10  Give characteristics of RISC and CISC.
Ans
Characteristics of RISC:
1. Relatively few instructions
2. Relatively few addressing modes
3. Memory access limited to load and store instructions
4. All operations done within the registers of the CPU
5. Fixed-length, easily decoded instruction format
6. Single-cycle instruction execution
7. Hardwired rather than microprogrammed control
8. A relatively large number of registers in the processor unit
9. Use of overlapped register windows to speed-up procedure call and return
10. Efficient instruction pipeline
Characteristics of CISC:
1. A larger number of instructions – typically from 100 to 250 instructions
2. Some instructions that perform specialized tasks and are used infrequently
3. A large variety of addressing modes – typically from 5 to 20 different modes
4. Variable-length instruction formats
5. Instructions that manipulate operands in memory

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